The present invention is related to a method for forming an isolation member in a trench of a semiconductor substrate. The resulted structure may be used for manufacturing a semiconductor device.
In a process for manufacturing a semiconductor device, a dielectric isolation member, e.g., a shallow trench isolation (STI) member, may be formed in a trench of a semiconductor substrate. The isolation member may isolate components and/or prevent electrical current leakage in the semiconductor device. In a process for forming the isolation member, a SICONI™ etching process may be performed to partially remove dielectric material that has been deposited in the trench. As a result of the SICONI™ etching process, a substantial amount of fluorine residues may remain in the trench. The fluorine residues may significantly interfere with subsequent deposition of dielectric material in the trench, such that the deposition rate for the dielectric material in the trench may be substantially low. Since the dielectric material deposition rate in the trench may be substantially lower than the dielectric material deposition rate away from the trench, dielectric material deposited away from the trench may accumulate substantially higher than dielectric material deposited in the trench; therefore, the subsequent planarization (and/or polishing) of the deposited isolation material may be substantially inefficient. As a result, the productivity associated with the isolation member and/or the semiconductor device may be unsatisfactorily.